1. Field of the Invention
This invention relates to a multi-bit data converter, wherein the data converter may be a digital-to-analog (xe2x80x9cD/Axe2x80x9d) converter or a D/A converter used within a feedback path of an analog-to-digital (xe2x80x9cA/Dxe2x80x9d) converter. The data converter utilizes differing rotational algorithms, each being independent of the other. Preferably one algorithm involves rotation in one direction and the other algorithm involves rotation in another direction, with pointers keeping track of the last component connected. Thus, the data converter preferably involves a bi-directional rotation mechanism to select from among a plurality of components for connection within the D/A converter in order to minimize non-linearity, tonal distortion and complexity normally attributed to conventional rotational or purely random dynamic element matching (xe2x80x9cDEMxe2x80x9d) logic.
2. Description of the Related Art
A popular data converter is a D/A converter either placed directly in the digital bitstream path or in the feedback loop path of an A/D converter. A typical A/D converter is one that quantifies the incoming analog signal magnitude at various time slices or sampling periods. The sampling rate can be Nyquist rate or a rate much higher than the Nyquist rate, often known as an xe2x80x9coversamplingxe2x80x9d rate.
A/D converters that use an oversampling modulator are often known as delta-sigma modulators. While a delta-sigma modulator is inherently an oversampling modulator, oversampling is just one of the techniques contributing to its overall performance. The oversampling modulator, or delta-sigma modulator, preferentially shapes the frequencies of the quantizer-induced noise so that the majority of noise lies between the Nyquist rate and the oversampling rate, and only a small portion is left in the frequency band of interest.
A delta-sigma modulator can be fairly simplistic in its architecture or rather complex depending on its targeted application. For example, the delta-sigma modulator can employ feedback to a single summing node at the input of a single integrator, or feedback to multiple summing nodes at the inputs of multiple integrators performing first order modulator, a second order modulator, etc. Examples of first and second order delta-sigma modulators are shown in U.S. Pat. No. 4,851,841 (herein incorporated by reference). In addition to multiple orders, delta-sigma modulators can be cascaded together with gain and/or scaling between stages, and possibly a noise cancellation circuit applied to each stage or combination of stages. Examples of cascaded delta-sigma modulators are described in U.S. Pat. Nos. 5,654,711; 5,146,166; 4,920,544; and 5,061,928 (each of which are herein incorporated by reference).
Regardless of whether they are single or multi-order, single or multi-stage, most modulators typically produce a single serial bit data stream of digital pulses representing a change in magnitude of the incoming analog signal. Delta-sigma modulators that produce a one-bit digital signal as a continuous stream of delta-sigma modulated pulses are known as one-bit quantizers. Oversampling modulators that receive analog signals are henceforth referred to as xe2x80x9canalog delta-sigma modulatorsxe2x80x9d, while oversampling modulators that receive digital signals are henceforth known as xe2x80x9cdigital delta-sigma modulators.xe2x80x9d
A one-bit analog delta-sigma modulator is known to have optimal linearity since the D/A converter in the feedback loop has only two levels, which makes a one-bit analog delta-modulator inherently linear regardless of its quantization threshold position. Using only two levels of quantization, the threshold between those levels need not be accurately positioned because it is preceded by the high DC gain of the integrator. More recent quantizers, however, are multi-level quantizers. Multi-level quantizers require, however, several thresholds and corresponding spacings between thresholds. For example, a multi-bit quantizer can use a high-speed flash converter that assigns one comparator for each possible level. The comparator outputs are encoded into an appropriate binary word representative of a multi-bit digital signal. Thus, instead of having a one-bit output, a multi-bit quantizer produces numerous bits forwarded in parallel across corresponding conductors of a multi-conductor bus.
A multi-bit quantizer associated with either an analog or digital delta-sigma modulator has many advantages over the corresponding 1-bit analog or digital delta-sigma modulator. For example, a multi-bit delta-sigma modulator (analog or digital) has an inherently lower quantization noise since the imputed noise by the multi-bit quantizer decreases exponentially with the number of bits used in the quantizer. Thus, every additional bit used in the multi-bit quantizer significantly reduces the quantization noise and lessens the complexity of both the modulator (i.e., orders and stages) and the digital decimation filter. The lower noise-shaping order is achievable with smaller oversampling ratios. The low pass filter requirements within the D/A converter is also minimized due to the lower imputed noise. Additionally, multi-bit modulation enjoys reduced idle channel tones and a more relaxed analog speed requirement. By minimizing noise, a lower oversampling ratio is achieved for a given noise-shaping order, or vice-versa.
While multi-bit modulators have significant advantages over 1-bit modulators, multi-bit modulators can, unfortunately, introduce non-linearity into the converter. Non-linearity is primarily caused by misplaced levels in the multi-bit D/A converter. The misplaced levels force the encoded digital output to skew or improperly map. While multi-bit quantizers have many advantages such as lower quantization noise, more stability, and lower complexity needed of the digital decimation filter and low pass filter, multi-bit quantizers inherently induce non-linear gain and, more importantly, non-linearity into the incoming signal itself.
There currently exists several strategies for achieving a more linear multi-bit D/A converter. For example, the D/A converter can be made of components external to the mixed signal integrated circuit embodying the delta-sigma modulator. Alternatively, critical elements of the D/A converter can be trimmed to ensure accuracy and compatibility. Both strategies attempt to make the 2Nxe2x88x921 parallel unit elements (hereinafter xe2x80x9ccomponentsxe2x80x9d) on the internal D/A topography approximately equal in value, where N is the number of bits received by a D/A converter. Forming the components external to the mixed signal integrated circuit, or trimming components on the same monolithic substrate on a dissimilar monolithic substrate, are techniques which can be categorized as xe2x80x9cstatic element matching.xe2x80x9d
Another method of element matching is often referred to as xe2x80x9cdynamic element matching,xe2x80x9d or DEM. DEM techniques are chosen to dynamically select differing subsets of each parallel unit element or component. Popular such components are resistors, transistors, current sources, and/or capacitors, which are targeted to be equal in value. The intent of DEM is to exploit the fact that the output of the multi-bit converter is followed by a filter that will remove high-frequency energy by converting the static error into a wide-band noise signal. DEM involves selecting different elements at different times, thereby imparting randomness into the selection process. An overview of the various fixed and dynamic element matching techniques is set forth in Carley et al., xe2x80x9cDelta-Sigma ADCs With Multibit Internal Converters,xe2x80x9d Delta-Sigma Data Converters: Theory, Design, and Simulation (herein incorporated by reference).
There are various known DEM techniques used to choose different elements within the D/A converter. For example, interconnection between what is known as a thermometer decoder and the unit elements can be determined at random for each time period. With ideal randomization, there will be no correlation between the mismatch error at one time and the mismatch error at another time. Thus, a pure random DEM will connect the N outputs from the thermometer decoder to the M switching elements in a time-varying fashion. The number of possible connections, however, is M factorial. When M is relatively small, it is easy to randomly select between all possible connections. However, when M is large, the number of possible connections is so large it becomes necessary to select only a subset of connections in order to conserve die area. Unfortunately, this approach only converts the mismatch induced distortion components to white noise. The inband signal-to-noise ratio (SNR) will still be degraded by component mismatch.
In an attempt to reduce the amount of mismatch induced error in the band of interest and improve SNR, many researchers and manufacturers have turned to a technique known as data weighted averaging, dynamic element rotation, or rotated data weighted averaging. Radke et al., xe2x80x9cA Spurious-Free Delta-Sigma DAC Using Rotated Data Weighted Averaging,xe2x80x9d Custom Integrated Circuits Conference; and, Baird et al., xe2x80x9cLinearity Enhancement of Multibit xcex94xcexa3 A/D and D/A Converters Using Data Weighted Averaging,xe2x80x9d IEEE Transactions on Circuits and Systems (each of which are herein incorporated by reference).
The intent behind using data weighted averaging or rotation is to consistently change the element connections between the thermometer decoder and the unit elements. Depending on the weighting of the input data, the components are selected cyclically. This action will average the mismatch over series of samples, and will suppress mismatch induced noise or distortion by first order noise shaping. The rotational change, however, is single directive, periodic and can be carried out using a conventional shifter, such as a barrel shifter. Conventional rotation thereby consistently rotates or shifts in a round-robin fashion the various element connections. For example, a first group of components or elements (i.e., capacitors, resistors and/or current sources) are connected in an assigned, single direction (or order) that can wrap back around to the first element and continues forward. In each case, however, the assigned component order is typically from left-to-right whereby the left most component is connected first, followed by the remaining connections until the last component (the right most component in the D/A conversion chain) is connected. This proceeds for subsequent switching, whereby the next grouping of components or elements begins with the component immediately right of the previous last component (the right most component). The dynamic weighted averaging, rotational or barrel-shifted, mechanism is always single-directed. An unfortunate aspect of this type of rotational scheme is the unfortunate introduction of tones at the D/A output. The velocity of the rotation is determined by the weighting of the incoming data. Therefore, because of the periodic nature of rotation, the mismatch error becomes translated to dependent tones instead of completely random noise. These tones can become audible in audio applications, and can reduce the spurious free dynamic range (xe2x80x9cSFDRxe2x80x9d) in communication applications.
The problems outlined above are in large part solved by using two independent rotational mechanisms for connecting components within a D/A converter. The first rotational mechanism may connect a subset of components that is the same, different from or partially different from the components being connected by the second rotational mechanism. Thus, the two independent rotational mechanisms allow for bi-directional rotation hereof. Bi-directional rotation can be achieved by a circuit implemented within a data converter, a suitable data converter being a multi-bit D/A converter. By using a bi-directional rotation scheme, tones are substantially eliminated within the output signal of a multi-bit modulator and/or quantizer.
Using a bi-directional rotation scheme within a multi-bit analog or digital converter (preferably a delta-sigma modulator) allows advantages of multi-bit modulation without the disadvantages of mismatch, non-linearity, and tonal defects normally attributed to multi-bit modulation and conventional DEM techniques.
According to one embodiment a circuit is provided for minimizing component value mismatches within a data converter (i.e., a D/A converter). The circuit includes a plurality of components and a plurality of corresponding switches. The switches are configured to connect a subset of the components in successive order progressing in a first direction and, subsequently, in successive order progressing in a second direction opposite the first direction. Connecting the subset in the first direction occurs when a thermometer code value is applied to switches within the data converter. Thus, the first code value will successively connect elements in a direction from left-to-right, and the next code value will successively connect switches in a direction from right-to-left. The next successive set of connections will re-connect in a left-to-right order, beginning with the last connection of the preceding left-to-right connection sequence. The bi-directional connection sequences will continue for each set of code values received by the data converter (e.g., D/A converter).
According to another embodiment, a system is provided. The system includes a multi-bit quantizer coupled to receive an input signal. DEM logic receives output from the quantizer and presents controlling signals to a D/A converter. Those signals are used to selectively couple components within the D/A converter. In particular, the control signal sequentially couples components in a first direction interspersed with coupling components within a second direction opposite the first direction. The input signal can be either digital or analog. Moreover, the output of the DEM activates a subset of switches within a D/A converter for connecting corresponding components to an operational amplifier.
According to yet another embodiment, a method is provided. The method is used to selectively connect components within a data converter, such as a D/A converter. The method includes first coupling a first set of components together, followed by coupling a second set of components together. The first set of components can be partially different or altogether different from the second set of components. Thereafter, third coupling occurs for connecting a third set of components together beginning with the last component within the first set and progressing among the plurality of components in a first direction. Thereafter, a fourth coupling occurs for connecting a fourth set of components together beginning with the last component within the second set and progressing among the plurality of components in a second direction opposite the first direction. The last component within the first set is preferably the last (or right-most) component connected during the first coupling, and wherein the last component within the second set is preferably the last (or left-most) component connected during the second coupling.